This paper is based on analysis of a common source - common gate low noise transconductance amplifier (CS-CG LNTA). Conventional noise analyses equations are modified by considering to the low output impedance of the sub-micron transistors and also, parasitic gate-source capacitance. The calculated equations are more accurate than calculated equations in other works. Also, analyses show that th...

This study investigates geometrical variability on the sensitivity of the junctionless tunneling field effect transistor (JLTFET) and Heterostructure JLTFET (HJLTFET) performance. We consider the transistor gate dielectric thickness as one of the main variation sources. The impacts of variations on the analog and digital performance of the devices are calculated by using computer aided design (...

This paper presents a new design for 14 transistor single bit full adder, implemented using five transistor XNOR/XOR cell and transmission gate multiplexer. For transmission gate multiplexer complementary gate control signals are required and in 14 transistor full Adder both XOR and XNOR signals are generated. XNOR/XOR cell shows high power consumption than single XNOR gate. So, 8 transistor fu...

In this paper, a new design of three transistor XOR gate is proposed using Independent Driven Double Gate MOSFET to achieve ultra-low power in sub threshold conduction. The proposed design has been compared with the three transistor XOR implemented using Symmetrical Driven Double Gate MOSFET in sub threshold region. A three transistor XOR gate designed using Independent Driven Double Gate MOSFE...

This paper compares two different logic styles based on 45 nm technology for implementing logic gates of upto two inputs in terms of their layout area, delay and power dissipation. The XOR gate has been implemented & designed using CMOS & Pass Transistor logic on 45 nm technology .The schematic of proposed gate has been designed & simulated by using DSCH3& its equivalent layout has been develop...

This paper shows that the Surrounding Gate Transistor (SGT) can be scaled down to decananometer gate lengths by using an intrinsically-doped body and gate work function engineering. Strong gate controllability is an essential characteristics of the SGT. However, by using an intrinsically-doped body, the SGT can realize a higher carrier mobility and stronger gate controllability of the silicon b...

Despite the simplicity of the hexagonal graphene structure formed by carbon atoms, the electronic behavior shows fascinating properties, giving high expectation for the possible applications of graphene in the field. The Graphene Nano-Ribbon Field Effect Transistor (GNRFET) is an emerging technology that received much attention in recent years. In this paper, we investigate the device performan...

a complete procedure for the design of w-band low noise amplifier in mmic technology is presented. the design is based on a simultaneously power and noise matched technique. for implementing the method, scalable bilateral transistor model parameters should be first extracted. the model is also used for transmission line utilized in the amplifier circuit. in the presented method, input/output ma...

Radio-frequency application of graphene transistors is attracting much recent attention due to the high carrier mobility of graphene. The measured intrinsic cut-off frequency (f(T)) of graphene transistor generally increases with the reduced gate length (L(gate)) till L(gate) = 40 nm, and the maximum measured f(T) has reached 300 GHz. Using ab initio quantum transport simulation, we reveal fo...